The present invention relates to a semiconductor nonvolatile memory utilized in electronic devices such as computers.
As shown in FIG. 2 a conventional semiconductor nonvolatile memory of the floating gate type is constructed such that a source region 2' and a drain region 3' of N.sup.+ type are formed in a face of a semiconductor substrate 1' of P type, a control gate electrode 8' is formed on a first channel region 4' through an insulating film 6', and a floating gate electrode 9' is formed on a second channel region 5' through another insulating film 7'. Such type of the known nonvolatile memory is disclosed, for example, in Daniel C. Guterm et al. "Electrically Alterable Nonvolatile Memory cell using a Floating-Gate Structure" IEEE Trans. Electron Device, vol. ED-26, No. 4, pp576-585(1979).
However, in the conventional semiconductor nonvolatile memory, the first channel region 4' and the second channel region 5' are formed by transfer printing technology so that the respective channel lengths L.sub.1 and L.sub.2 cannot be reduced smaller than the transfer printing resolution of the respective gate electrodes, thereby causing the drawback that it would be difficult to lower a programing voltage effective to inject electric charges into the floating gate electrode.